1. Field of the Invention
The present invention relates generally to a system and method for measuring an overlay error, and more particularly, to a method for measuring an overlay error by matching the deviations of the diffraction spectrum of overlay target pairs.
2. Description of the Related Art
Continuing improvements in semiconductor process technology have increased the accuracy required for overlay measurement. According to the ITRS (International Technology Roadmap for Semiconductor) the overlay tolerance in the semiconductor process is about one-sixth of line width, and the corresponding metrology error budget is only about one-sixtieth of line width. Therefore, due to diffraction limitations and proximity effects, image-based overlay metrology cannot fulfill the accuracy requirements for the next-generation structural parameter measurement. Diffraction-based metrology, which is different from image-based overlay metrology and is not influenced by the proximity effects, has high repeatability and reproducibility characteristics and will become an important overlay measurement technology. An overlay measurement system using diffraction-based metrology technology is comprised of a scatterometer and a program for matching analysis, and the analysis technique can be a theoretical model-based method or an empirical model-based method. The spectrum of the theoretical model-based method is calculated using a theory such as RCWT (Rigorous Coupled Wave Theory) or FDTD (Finite Difference Time Domain) and is compared with a measured spectrum to find the overlay error. In practice, the parameters such as line widths, thickness, sidewall angles, and overlay errors are typically strongly correlated, and any incorrect parameter will result in incorrect overlay calculation.
The empirical model-based method compares measured data with an empirical regression line, which approximates the data obtained and analysed by measuring the diffraction spectrum formed by a series of (at least four) gratings having different overlay deviation patterns. These gratings are fabricated on a wafer. The advantage of this method is that it does not require a lot of simulations for setting up a matching library, and therefore there is no strong correlation problem between the parameters. However, one disadvantage of this method is that many gratings must be fabricated and measured on a semiconductor wafer for gathering the library data, which requires a lot of time.